CMSC 310 at the University of Maryland Global Campus studies the fundamental concepts of computer architecture and the factors that influence a system's performance.
Formerly CMIS 310, the course aims to apply practical skills to computer systems architecture. UMGC lists the topics as data representation, assembly language, central processing unit (CPU) architecture, memory architecture and input/output (I/O) architecture.
The prerequisite is CMSC 115 (or CMIS 141), so you can already program in a high-level language. CMSC 310 removes the layers of abstraction. Thinking in binary, registers and memory addresses feels unfamiliar at first, and the problem sets demand exact, step-by-step working.
Course at a Glance
| Item | Details |
|---|---|
| University | University of Maryland Global Campus (UMGC) |
| Course code | CMSC 310 (3 credits), formerly CMIS 310 |
| Level | Undergraduate, upper level |
| Prerequisite | CMSC 115 (or CMIS 141) |
| Credit note | Credit for only one of CMIS 270, CMIS 310, CMSC 310, CMSC 311 or IFSM 310 |
| Typical work | Number system problems, assembly exercises, architecture analyses |
What CMSC 310 Covers
| Topic | What you learn |
|---|---|
| Data representation | Binary, hexadecimal, two's complement, floating point, characters |
| Assembly language | Instructions, registers, addressing and how high-level code maps to them |
| CPU architecture | Datapath, control, the fetch-decode-execute cycle, pipelining |
| Memory architecture | The memory hierarchy, caches and virtual memory |
| I/O architecture | How devices communicate: polling, interrupts and direct memory access |
Key Concepts Explained
Two's Complement
Computers store negative integers in two's complement: invert the bits of the positive value and add one.
Example: In 8 bits, +5 is 00000101. Inverting gives 11111010; adding 1 gives 11111011, which represents -5. Adding 00000101 and 11111011 gives 00000000 with a carry out that is discarded, confirming 5 + (-5) = 0.
Cache Performance
Caches work because programs tend to reuse recent data (temporal locality) and nearby data (spatial locality). Average memory access time combines hit time, miss rate and miss penalty.
Example: With a 1 ns cache hit time, a 5% miss rate and a 100 ns miss penalty, average access time = 1 + 0.05 x 100 = 6 ns. Halving the miss rate to 2.5% brings it to 3.5 ns, a large gain from a small change.
Pipelining
Pipelining overlaps instruction stages so several instructions are in progress at once, like an assembly line. Hazards, such as one instruction needing the result of the previous one, cause stalls.
Thinking About Performance
UMGC's description stresses the factors that influence system performance. A common framework is the CPU time equation: instruction count x cycles per instruction x clock cycle time.
The equation explains why a faster clock alone does not guarantee faster programs. A design that raises clock speed but increases cycles per instruction may gain nothing. Assignments that compare processors or designs reward students who reason with all three factors rather than one.
Typical Assignments and How to Approach Them
| Assignment type | What it tests | How to approach it |
|---|---|---|
| Number system problems | Conversions and arithmetic | Show every step, not just the answer |
| Assembly exercises | Low-level program logic | Trace registers line by line in a table |
| Performance calculations | Applying formulas | State the formula, substitute, then interpret |
| Architecture analysis | Comparing designs | Link each feature to its effect on performance |
How Input and Output Work
I/O architecture covers how the CPU communicates with devices. Three approaches come up repeatedly:
- Polling: the CPU repeatedly checks a device's status, which is simple but wastes cycles.
- Interrupts: the device signals the CPU when it needs attention, freeing the CPU for other work.
- Direct memory access (DMA): a controller moves blocks of data between device and memory, interrupting the CPU only when the transfer ends.
Comparison questions usually turn on overhead: DMA suits large transfers such as disk reads, while interrupts suit occasional events such as key presses.
Where Students Get Stuck
- Sign and overflow errors. Track bit width carefully in two's complement arithmetic.
- Floating point format. Sign, exponent bias and mantissa each need care.
- Assembly tracing. Keep a register table instead of tracking values in your head.
- Single-factor reasoning. Performance depends on several factors together.
Study Tips for CMSC 310
- Practice conversions daily until binary and hex feel natural.
- Write a short high-level snippet and work out its assembly equivalent.
- Draw the memory hierarchy with typical speeds and sizes to see the trade-offs.
- Check each numeric answer by converting it back.
How We Help with CMSC 310
Send the problem set or project, your working and the rubric. A computer science tutor can explain concepts, check your method, or prepare fully worked solutions to similar problems so you can apply the method yourself.
GradeEssays is independent of the University of Maryland Global Campus. Our help is tutoring and model material within UMGC's academic integrity policy; we never take quizzes or exams for students.
Understand What Happens Inside the Machine
Share your CMSC 310 problems and attempts. A tutor prepares worked examples of similar problems so you can learn the method.
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Frequently Asked Questions
UMGC lists CMSC 115 (or CMIS 141).
CMSC 310 was formerly CMIS 310. UMGC allows credit for only one of CMIS 270, CMIS 310, CMSC 310, CMSC 311 or IFSM 310.
Yes. UMGC lists assembly language among the topics, along with data representation, CPU, memory and I/O architecture.
You need comfort with arithmetic in different number bases and simple formulas, not advanced calculus.
CMSC 310 (or CMIS 310) and CMSC 315 are the prerequisites for CMSC 412 Operating Systems.
No. We never take quizzes or exams. We explain concepts and provide worked examples of similar problems.